High Performance Computing:
Union of Software and Reconfigurable Logic

Speaker:          Dr. Ivo Bolsens
                        Senior VP and CTO, Xilinx

Location:         Microsoft Research           (use rear/North door)    
                        1288 Pear Ave.                 (parking all around Building 6)
                        Mountain View, CA

When:              Tues. Oct. 12:   6:30 pm Networking with food and beverage
                                                7:00 pm Presentation

Registration:    Free  –  but Please Register!      [ Please bring your PDF ticket. ]

Sponsors:        See below for our 5 sponsors who help cover the cost of food!

Abstract:

Modern FPGA platforms have capabilities that are well suited to assume a more central role in the implementation of complex embedded processing systems. In particular, FPGAs are well placed to be at the heart of complex signal processing, packet processing and high performance computing applications because of their high computational efficiency matched by high bandwidth concurrent memory access and rich on-chip interconnectivity, all of this combined with complete programmability.

The key to unleashing the full horsepower of FPGA platforms to the system designer is, first of all, a hardware platform that allows tight integration between the processor, the programmable logic and the memory. Second, the hardware architecture has to be supported by a programming flow that abstracts the hardware implementation details and provides seamless and efficient mapping of system functions on multiple processor cores and programmable hardware functions. Finally, a programmable infrastructure has to be provided that targets specific requirements for packet processing or signal processing or high performance computing.

Bio:

Ivo Bolsens is senior vice president and chief technology officer (CTO) of Xilinx, with responsibility for advanced technology development, Xilinx research laboratories and Xilinx university program.

Bolsens came to Xilinx in 2001 from the Belgium-based IMEC, where he was vice president of System Design R&D. His responsibilities included the HW and SW development of ASSP’s for of digital signal processing applications and wireless communication terminals. He also headed the activities on tool development for HW/SW co-design and system-on-chip design.

Bolsens holds a PhD and an MSEE from the Catholic University of Leuven in Belgium.
 

Thanks to those sponsoring part of our pizza this meeting: